? 2005 fairchild semiconductor corporation ds012574 www.fairchildsemi.com october 1995 revised february 2005 74lcx38 low voltage quad 2-input nand gate (open drain) with 5v tolerant inputs 74lcx38 low voltage quad 2-input nand gate (open drain) with 5v tolerant inputs general description the lcx38 contains four 2-input open drain nand gates. the inputs tolerate voltages up to 7v allowing the interface of 5v systems to 3v systems. the 74lcx38 is fabricated with advanced cmos technol- ogy to achieve high speed operation while maintaining cmos low power dissipation. features 5v tolerant inputs 2.3v to 3.6v v cc specifications provided 5.0 ns t pd max (v cc 3.3v), 10 p a i cc max power down high impedance inputs and outputs 24 ma output drive (v cc 3.0v) implements patented noise/emi reduction circuitry latch-up performance exceeds 500 ma esd performance: human body model ! 2000v machine model ! 150v ordering code: devices also available in tape and reel. specify by appending the suffix letter ?x? to the ordering code. pb-free package per jedec j-std-020b. note 1: ?_nl? indicates pb-free package (per jedec j-std-020b). device available in tape and reel only. logic symbol ieee/iec connection diagram pin descriptions order number package package description number 74lcx38m m14a 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow 74lcx38mx_nl (note 1) m14a pb-free 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow 74lcx38sj m14d pb-free 14-lead small outline package (sop), eiaj type ii, 5.3mm wide 74lcx38mtc mtc14 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide 74lcx38mtcx_nl (note 1) mtc14 pb-free 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pin names description a n , b n inputs o n outputs
www.fairchildsemi.com 2 74lcx38 absolute maximum ratings (note 2) recommended operating conditions (note 4) note 2: the absolute maximum ratings are those beyond which the safety of the device cannot be guaranteed. the device should not be ope rating at these limits. the parametric values defined in the electrical characteristics tables are not guaranteed at the absolute maximum ratin g s. the ? recommended operating conditions ? table will define the conditions for actual device operation. note 3: i o absolute maximum rating must be observed. note 4: unused inputs must be held high or low. they may not float. dc electrical characteristics symbol parameter value conditions units v cc supply voltage 0.5 to 7.0 v v i dc input voltage 0.5 to 7.0 v v o dc output voltage 0.5 to 7.0 output in high or low state (note 3) v i ik dc input diode current 50 v i gnd ma i ok dc output diode current 50 v o gnd ma i o dc output sink current (i ol ) 50 ma i cc dc supply current per supply pin r 100 ma i gnd dc ground current per ground pin r 100 ma t stg storage temperature 65 to 150 q c symbol parameter min max units v cc supply voltage operating 2.0 3.6 v data retention 1.5 3.6 v i input voltage 05.5v v o output voltage 0 5.5 v i ol output current v cc 3.0v 3.6v 24 ma v cc 2.7v 3.0v 12 v cc 2.3v 2.7v 8 t a free-air operating temperature 40 85 q c ' t/ ' v input edge rate, v in 0.8v ? 2.0v, v cc 3.0v 0 10 ns/v symbol parameter conditions v cc t a 40 q c to 85 q c units (v) min max v ih high level input voltage 2.3 2.7 1.7 v 2.7 3.6 2.0 v il low level input voltage 2.3 2.7 0.7 v 2.3 3.6 0.8 v ol low level output voltage i ol 100 p a2.3 3.6 0.2 i ol = 8ma 2.3 0.6 i ol 12 ma 2.7 0.4 v i ol 16 ma 3.0 0.4 i ol 24 ma 3.0 0.55 i i input leakage current 0 d v i d 5.5v 2.3 3.6 r 5.0 p a i off power-off leakage current v i or v o 5.5v 0 10 p a i cc quiescent supply current v i v cc or gnd 2.3 3.6 10 p a 3.6v d v i d 5.5v 2.3 3.6 r 10 ' i cc increase in i cc per input v ih v cc 0.6v 2.3 3.6 500 p a i ohz off state current v o 5.5 2 - 3.6 10 p a
3 www.fairchildsemi.com 74lcx38 ac electrical characteristics note 5: skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of th e same device. the specification applies to any outputs switching in the same direction, either high-to-low (t oshl ) or low-to-high (t oslh ). dynamic switching characteristics capacitance symbol parameter t a 40 q c to 85 q c, r l 500 : units v cc 3.3v r 0.3v v cc 2.7v v cc 2.5v r 0.2v c l 50 pf c l 50 pf c l 30 pf min max min max min max t pzl propagation delay time 1.5 5.0 1.5 5.5 1.5 6.5 ns t plz 1.5 5.0 1.5 5.5 1.5 6.0 t oshl output to output skew 1.0 ns t oslh (note 5) 1.0 symbol parameter conditions v cc t a 25 q c units (v) typical v olp quiet output dynamic peak v ol c l 50 pf, v ih 3.3v, v il 0v 3.3 0.8 v c l 30 pf, v ih 2.5v, v il 0v 2.5 0.6 v olv quiet output dynamic valley v ol c l 50 pf, v ih 3.3v, v il 0v 3.3 0.8 v c l 30 pf, v ih 2.5v, v il 0v 2.5 0.6 symbol parameter conditions typical units c in input capacitance v cc open, v i 0v or v cc 7pf c out output capacitance v cc 3.3v, v i 0v or v cc 8pf c pd power dissipation capacitance v cc 3.3v, v i 0v or v cc , f 10 mhz 25 pf
www.fairchildsemi.com 4 74lcx38 ac loading and waveforms generic for lcx family figure 1. ac test circuit (c l includes probe and jig capacitance) 3-state output low enable and disable times for logic t rise and t fall figure 2. waveforms (input pulse characteristics; f = 1mhz, t r = t f = 3ns) test switch t pzl , t plz 6v at v cc 3.3 r 0.3v v cc x 2 at v cc 2.5 r 0.2v symbol v cc 3.3v r 0.3v 2.7v 2.5v r 0.2v v mi 1.5v 1.5v v cc /2 v mo 1.5v 1.5v v cc /2 v x v ol 0.3v v ol 0.3v v ol 0.15v v y v oh 0.3v v oh 0.3v v oh 0.15v
5 www.fairchildsemi.com 74lcx38 physical dimensions inches (millimeters) unless otherwise noted 14-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow package number m14a
www.fairchildsemi.com 6 74lcx38 physical dimensions inches (millimeters) unless otherwise noted (continued) pb-free 14-lead small outline package (sop), eiaj type ii, 5.3mm wide package number m14d
7 www.fairchildsemi.com 74lcx38 low voltage quad 2-input nand gate (open drain) with 5v tolerant inputs physical dimensions inches (millimeters) unless otherwise noted (continued) 14-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide package number mtc14 fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and fairchild reserves the right at any time without notice to change said circuitry and specifications. life support policy fairchild ? s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. a critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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